Arm platforms: Rename PLAT_ARM_NS_IMAGE_OFFSET

PLAT_ARM_NS_IMAGE_OFFSET is in fact not an offset relative to some base
address, it is an absolute address. Rename it to avoid any confusion.

Change-Id: I1f7f5e8553cb267786afe7e5f3cd4d665b610d3f
Signed-off-by: Sandrine Bailleux <[email protected]>

diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h
index 575db04f4067fc5f05647b3358a064eec8dbde32..ec28db0750d3833c6311ad047fd0b7df1aa1dc1c 100644 (file)
--- a/include/plat/arm/css/common/css_def.h
+++ b/include/plat/arm/css/common/css_def.h
@@ -183,7 +183,7 @@
 #endif /* CSS_LOAD_SCP_IMAGES */
 
 /* Load address of Non-Secure Image for CSS platform ports */
-#define PLAT_ARM_NS_IMAGE_OFFSET       U(0xE0000000)
+#define PLAT_ARM_NS_IMAGE_BASE         U(0xE0000000)
 
 /* TZC related constants */
 #define PLAT_ARM_TZC_FILTERS           TZC_400_REGION_ATTR_FILTER_BIT_ALL

diff --git a/plat/arm/board/fvp/include/platform_def.h b/plat/arm/board/fvp/include/platform_def.h
index fcf363d7c4a828ea5ebafe5ec1e7c8d2bfe813a1..115310175e939416a09fa990acae452f6e8d6ab0 100644 (file)
--- a/plat/arm/board/fvp/include/platform_def.h
+++ b/plat/arm/board/fvp/include/platform_def.h
@@ -53,7 +53,7 @@
 /*
  * Load address of BL33 for this platform port
  */
-#define PLAT_ARM_NS_IMAGE_OFFSET       (ARM_DRAM1_BASE + UL(0x8000000))
+#define PLAT_ARM_NS_IMAGE_BASE         (ARM_DRAM1_BASE + UL(0x8000000))
 
 /*
  * PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the

diff --git a/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c b/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
index e23dd258b2e8bfea0d9c37ee8116a7e923479f23..0463bc022d8789b177d75edf6e093e4217e71d37 100644 (file)
--- a/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
+++ b/plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
@@ -75,11 +75,11 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
            SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
                    VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
 #else
-           .ep_info.pc = PLAT_ARM_NS_IMAGE_OFFSET,
+           .ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
 
            SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
                    VERSION_2, image_info_t, 0),
-           .image_info.image_base = PLAT_ARM_NS_IMAGE_OFFSET,
+           .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
            .image_info.image_max_size = ARM_DRAM1_SIZE,
 #endif /* PRELOADED_BL33_BASE */
 

diff --git a/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c b/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c
index c0f42f3108bfd8ee2b66acbc7374f1783f9d419f..96f51137563d46c60ab6617ac9319d4f2f534332 100644 (file)
--- a/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c
+++ b/plat/arm/common/aarch64/arm_bl2_mem_params_desc.c
@@ -176,11 +176,11 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
            SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
                    VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
 # else
-           .ep_info.pc = PLAT_ARM_NS_IMAGE_OFFSET,
+           .ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
 
            SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
                    VERSION_2, image_info_t, 0),
-           .image_info.image_base = PLAT_ARM_NS_IMAGE_OFFSET,
+           .image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
            .image_info.image_max_size = ARM_DRAM1_SIZE,
 # endif /* PRELOADED_BL33_BASE */
 

diff --git a/plat/arm/common/arm_common.c b/plat/arm/common/arm_common.c
index 5361d4ad169760a7eca197e583bdf19f7de54428..0442945b8a1e191383eb25217f698cdb98ea5494 100644 (file)
--- a/plat/arm/common/arm_common.c
+++ b/plat/arm/common/arm_common.c
@@ -40,7 +40,7 @@ uintptr_t plat_get_ns_image_entrypoint(void)
 #ifdef PRELOADED_BL33_BASE
        return PRELOADED_BL33_BASE;
 #else
-       return PLAT_ARM_NS_IMAGE_OFFSET;
+       return PLAT_ARM_NS_IMAGE_BASE;
 #endif
 }
 

diff --git a/plat/arm/common/arm_nor_psci_mem_protect.c b/plat/arm/common/arm_nor_psci_mem_protect.c
index dfbd12900c69e73961c83188d5b46c0c14345ae2..3a700598df9faea66230ff1e5bc3c6dc39b22681 100644 (file)
--- a/plat/arm/common/arm_nor_psci_mem_protect.c
+++ b/plat/arm/common/arm_nor_psci_mem_protect.c
@@ -21,7 +21,7 @@
  * until the end of DRAM1.
  * We limit the size of DRAM2 to 1 GB to avoid big delays while booting
  */
-#define DRAM1_NS_IMAGE_LIMIT  (PLAT_ARM_NS_IMAGE_OFFSET + (32 << TWO_MB_SHIFT))
+#define DRAM1_NS_IMAGE_LIMIT  (PLAT_ARM_NS_IMAGE_BASE + (32 << TWO_MB_SHIFT))
 #define DRAM1_PROTECTED_SIZE  (ARM_NS_DRAM1_END+1u - DRAM1_NS_IMAGE_LIMIT)
 
 static mem_region_t arm_ram_ranges[] = {

diff --git a/plat/xilinx/zynqmp/include/platform_def.h b/plat/xilinx/zynqmp/include/platform_def.h
index fb1041137fde7861ed841912ce621995abf903b8..7b062fcaa89832bb65b4dcf7665750fdf4ab92b6 100644 (file)
--- a/plat/xilinx/zynqmp/include/platform_def.h
+++ b/plat/xilinx/zynqmp/include/platform_def.h
@@ -66,9 +66,9 @@
  * BL33 specific defines.
  ******************************************************************************/
 #ifndef PRELOADED_BL33_BASE
-# define PLAT_ARM_NS_IMAGE_OFFSET      0x8000000
+# define PLAT_ARM_NS_IMAGE_BASE        0x8000000
 #else
-# define PLAT_ARM_NS_IMAGE_OFFSET      PRELOADED_BL33_BASE
+# define PLAT_ARM_NS_IMAGE_BASE        PRELOADED_BL33_BASE
 #endif
 
 /*******************************************************************************